HY5PS561621BLFPE3I Datasheet, PDF (19/34 Pages) Hynix Semiconductor – 256Mb DDR2 SDRAM

Parameter
Exit self refresh to a non-read command
Exit self refresh to a read command
Exit precharge power down to any non-read
command
Exit active power down to read command
Exit active power down to read command
(Slow exit, Lower power)
CKE minimum pulse width
(high and low pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on(Power-Down mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down mode)
ODT to power down entry latency
ODT power down exit latency
OCD drive mode output delay
Minimum time clocks remains ON after CKE
asynchronously drops LOW
1
1HY5PS561621B(L)FP-xI
Symbol
tXSNR
tXSRD
DDR2-400
min
max
tRFC + 10
200
-
DDR2-533
min
max
tRFC + 10
200
-
-Continue-
Unit Note
ns
tCK
tXP
2
-
2
-
tCK
tXARD
2
2
tCK
1
tXARDS
6 - AL
6 - AL
tCK
1, 2
t_CKE
3
3
tCK
27
t_AOND
2
2
2
2
tCK
t_AON
tAC(min)
tAC(max)+
1
tAC(min)
tAC(max)+
1
ns
16
t_AONPD
2tCK+
2tCK+
tAC(min)+2 tAC(max)+ tAC(min)+2 tAC(max)+
ns
1
1
t_AOFD
2.5
2.5
2.5
2.5
tCK
t_AOF
tAC(min)
tAC(max)+
0.6
tAC(min)
tAC(max)+
0.6
ns
17
t_AOFPD
2.5tCK+
2.5tCK+
tAC(min)+2 tAC(max)+ tAC(min)+2 tAC(max)+
ns
1
1
tANPD
3
3
tCK
tAXPD
8
8
tCK
tOIT
0
12
0
12
ns
tDelay
tIS+tCK+tIH
tIS+tCK+tIH
ns
15
Rev. 0.2 / Apr. 2008
19