GDC21D401B Datasheet, PDF (14/28 Pages) Hynix Semiconductor – Video Decoder

5.13 Host Interface
I²C bus interface
I²C bus interface is used for host data interface. It
operates only as a Slave. The Chip-ID(dev
address) of this IC is “0001111”b. Data on the
I²C-bus can be transferred at the rate up to 100
GDC21D401B
kbit/s in the standard mode, or up to 400 kbit/s in
the fast mode. I²C bus data read/write formats of
this IC are shown in the Fig 5, 6, and 7. Burst
Read Cycle can be used for the user data reading.
For more information, see the I²C bus interface
standard.
START
WRITE
CHIP ID
ACK
START
WRITE
ACK
CHIP ID
ACK
PAUSE
ACK
S 0001111 0 0 REG. ADDR.(7:0) 0 S 0001111 0 0 REG. DATA(7:0) 0 P
Figure 5. Write Cycle Diagram
START
WRITE
CHIP ID
ACK
START
READ
ACK
CHIP ID
ACK
PAUSE
ACK
S 0001111 0 0 REG. ADDR.(7:0) 0 S 0001111 1 0 REG. DATA(7:0) 1 P
Figure 6. Read Cycle Diagram
START
WRITE
CHIP ID
ACK
START
READ
ACK
CHIP ID
ACK
ACK
S 0001111 0 0 REG. ADDR.(7:0) 0 S 0001111 1 0 REG. DATA(7:0) 0
REG. DATA(7:0) 0
. . . . . . REG. DATA(7:0) 1 P
ACK
ACK
PAUSE
Figure 7. Burst Read Cycle Diagram
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