HY5S7B2ALFP-6 Datasheet, PDF (10/53 Pages) Hynix Semiconductor – 512M (16Mx32bit) Mobile SDRAM

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512Mbit (16Mx32bit) Mobile SDR Memory
HY5S7B2ALF(P) Series
DC CHARACTERISTICS II (TA= -30 to 85^oC)
Parameter
Symbol
Test Condition
Speed
Unit Note
166MHz 133MHz 105MHz
Operating Current
IDD1
Burst length=1, One bank active
tRC ≥ tRC(min), IOL=0mA
70
60
mA 1
Precharge Standby IDD2P
Current
in Power Down Mode ^IDD2PS
CKE ≤ VIL(max), tCK = 15ns
CKE ≤ VIL(max), tCK = ∞
0.3
mA
0.3
mA
CKE ≥ VIH(min), CS ≥ VIH(min), tCK
= 15ns
Precharge Standby
Current
IDD2N
Input signals are changed one time
during
10
in Non Power Down
2clks.
mA
Mode
All other pins ≥ VDD-0.2V or ≤ 0.2V
IDD2NS
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
1
Active Standby Current ^IDD3P
in Power Down Mode _IDD3PS
CKE ≤ VIL(max), tCK = 15ns
CKE ≤ VIL(max), tCK = ∞
5
mA
3
CKE ≥ VIH(min), CS ≥ VIH(min), tCK
= 15ns
Active Standby Current ^IDD3N
Input signals are changed one time
during
15
in Non Power Down
2clks.
mA
Mode
All other pins ≥ VDD-0.2V or ≤ 0.2V
IDD3NS
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
10
Burst Mode Operating
Current
IDD4
tCK ≥ tCK(min), IOL=0mA
All banks active
80
70
mA 1
Auto Refresh Current IDD5 tRFC ≥ tRFC(min)
120
mA
Self Refresh Current IDD6
CKE ≤ 0.2V
See Next Page
mA 2
Standby Current in
Deep Power Down
Mode
IDD7
See p.44~45 & 52 ~ 53
10
uA
Notes :
1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open
2. See the tables of next page for more specific IDD6 current values.
Rev 1.2 / Nov. 2008
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