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HI-6130_16 Datasheet, PDF (103/296 Pages) Holt Integrated Circuits – 3.3V BC / MT / RT Multi-Terminal Device
HI-6130, HI-6131
Bit No. Mnemonic
7
DSR
6
SFS
5
LE
4
SE
3
WE
2
RRGSA
1
RRCW2
R/W Reset Function
Data Buffer Rollover
R/W 0 Bit 7 is logic 1 to indicate that this message overran the monitor Data
Buffer end address, causing the storage pointer to roll over to the base
address.
Status Flag Set
R/W 0
Bit 6 is logic 1 when a status bit was set in an RT Status Word response.
Word Count (Length) Error
Bit 5 indicates that the number of data words transmitted by the BC or
R/W 0 RT differs from the Word Count specified in the Command Word. An RT
Status Word with the Busy bit set will not cause Word Count Error. A
transmit command with Response Timeout will not cause Word Count
Error.
Sync Type Error
Bit 4 is logic 1 to indicate that a BC transmitted data sync with a
R/W 0 Command Word, or a command / status sync occurred with Data Word,
or an RT responded with data sync in its Status Word and/or command/
status sync in a Data Word.
Invalid Word Error (WE)
R/W 0 Bit 3 is logic 1 indicate on invalid word error occurred. This includes
Manchester decoding errors in the sync pattern or word bits, or the
wrong number of bits in the word, or parity error.
RT-to-RT Gap/Sync/Address Error (RRGSA)
Bit 2 is logic 1 if one or more of the following RT-RT message conditions
occur:
R/W 0
• MT Gap Check is enabled (bit 12 equals 1 in register 0x0029) and
an RT Status Word is received having a response time less than
4µs, per MIL-STD-1553B (mid-parity to mid-sync). In other words,
the bus “dead time” was less than 2µs.
• One of the RTs responds with an invalid Status Word, having a sync
error, a Manchester encoding error, bit count error and/or parity error
• One of the RT Status Words contains an RT Address that differs
from the RT Address in the corresponding Command Word.
RT-to-RT Command Word 2 Error (RRCW2)
Bit 1 is logic 1 if an RT-to-RT message occurs (two contiguous
Command Words) with one or more of the following illogical conditions:
R/W 0
• Transmit Command Word 2 T/R bit equals 0 (receive)
• Transmit Command Word 2 subaddress field equals 00000 or 11111
(mode command indicated)
• Transmit Command Word 2 has the same RT Address as Receive
Command Word 1
• Transmit Command Word 2 has sync error
HOLT INTEGRATED CIRCUITS
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