BB301M Datasheet, PDF (8/10 Pages) Hitachi Semiconductor – Build in Biasing Circuit MOS FET IC UHF RF Amplifier

BB301M
Noise Figure vs. Drain Current
4
V_DS = 5 V
V_G1 = 5 V
3
V_G2S = 4 V
R_G = variable
f = 200 MHz
2
1
0
5 10 15 20 25 30
Drain Current I_D (mA)
Gain Reduction vs.
Gate2 to Source Voltage
60
V_DS = 5 V
50
V_G1 = 5 V
V_G2S = 4 V
40
R_G = 100 k Ω
f = 200 MHz
30
20
10
0
1
2
3
4
5
Gate2 to Source Voltage V_G2S (V)
Drain Current vs. Gate Resistance
30
25
20
15
10
5
V_DS = 5 V
V_G1 = 5 V
V_G2S = 4 V
0
10 20 50
100 200
500 1000
Gate Resistance R_G (kΩ)
Input Capacitance vs.
Gate2 to Source Voltage
4
3
2
1
V _DS = 5 V
V _G1= 5 V
R_G= 100 k Ω
f = 1 MHz
0
1
2
3
4
5
Gate2 to Source Voltage V_G2S (V)
8