HB288064MM1 Datasheet, PDF (68/79 Pages) Hitachi Semiconductor – MultiMediaCard 64 MByte

HB288064MM1
3.6 V
Bus master supply voltage
2.7 V
2.0 V
Card logic working
voltage range
Memory field
working voltage
range
Time
Power up time Supply ramp up time
Initialization sequence
N_CC
N_CC
N_CC
CMD1
CMD1
CMD1
CMD2
Initialization delay: The maximum of
1 msec, 74 clock cycles and supply
ramp up time
Optional repetitions of CMD1
until no cards are responding
with busy bit set.
Power-up Diagram
• After power up (including hot insertion, i.e. inserting a card when the bus is operating) the
MultiMediaCard enters the idle state. During this state the MultiMediaCard ignores all bus transactions
until CMD1 is received.
• CMD1 is a special synchronization command used to negotiate the operation voltage range and to poll
the cards until they are out of their power-up sequence. Besides the operation voltage pro-file of the
cards, the response to CMD1 contains a busy flag, indicating that the card is still working on its power-
up procedure and is not ready for identification. This bit informs the host that at least one card is not
ready. The host has to wait (and continue to poll the cards) until this bit is cleared.
• Getting individual cards, as well as the whole MultiMediaCard system, out of idle state is up to the
responsibility of the bus master. Since the power up time and the supply ramp up time depend on
application parameters such as the maximum number of MultiMediaCards, the bus length and the power
supply unit, the host must ensure that the power is built up to the operating level (the same level which
will be specified in CMD1) before CMD1 is transmitted.
• After power up the host starts the clock and sends the initializing sequence on the CMD line. This
sequence is a contiguous stream of logical ‘1’s. The sequence length is the maximum of 1 msec, 74
clocks or the supply-ramp-up-time; The additional 10 clocks (over the 64 clocks after what the card
should be ready for communication) are provided to eliminate power-up synchronization problems.
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