HB288064MM1 Datasheet, PDF (40/79 Pages) Hitachi Semiconductor – MultiMediaCard 64 MByte

HB288064MM1
Responses
All responses are sent via command line (CMD), all data starts with the MSB.
Format R1 (response command): response length 48 bit.
0
0
bit5...bit0 bit31...bit0 bit6...bit0 1
start bit card command status
CRC
end bit
The contents of the status field are described in Chapter “Status”
Format R1b (response command with busy signal):
R1b is identical to R1 with an optional busy signal transmitted on the data line. The card may become
busy after receiving these commands based on its state prior to the command reception.
Format R2 (CID, CSD register): response length 136 bits.
Note: Bit 127 down to bit 1 of CID and CSD are transferred, the reserved bit [0] is replaced by the end bit.
0
0
start bit card
bit5...bit0 bit127...bit1
reserved CID or CSD register
including internal CRC
1
end bit
CID register is sent as a response to commands CMD2 and CMD10.
CSD register is sent as a response to the CMD9.
Format R3 (OCR): response length 48 bits.
0
0
bit5...bit0 bit31...bit0 bit6...bit0 1
start bit card reserved OCR field reserved end bit
The OCR is sent as a response to the CMD1 to signalize the supported voltage range. The HB288064MM1
supports the range from 2.7 V to 3.6 V. Respectively the value of all bits of the OCR field of the
HB288064MM1 is set to 0x80FF8000. So the R3 frame of the HB288064MM1 contains the value
0x3F80FF8000FF if the card is ready and 0x3F00FF8000FF if the card is busy.
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