HN27C4000G Datasheet, PDF (3/20 Pages) Hitachi Semiconductor – 524288-Word ®8-Bit/262144-Word X 16-Bit CMOS UV Erasable and Programmable ROM

Block Diagram
A7
:
:
:
:
:
:
:
:
:
:
:
:
A17
I/O0
:
:
:
I/O15
HN27C4000G Series
X-
Decoder
2,048 x 2,048
Memory Matrix
Input
Data
Control
Y-Gating
Y-Decoder
CE
OE
V_CC
V_PP
H
V_SS
A0 ^{. . . . . . . . . . . . .} A6
H : High threshold inverter
Mode Selection
Mode
Pin
CE OE A9 BYTE/V_PP V_CC I/O0 – I/O7, I/O8 – I/O14, I/O15/A-1
DG-40A (10) (12) (39) (31)
(21) (13 – 20, 22 – 28, 29)
Read (X16 bit)
V_IL V_IL X
V_IH
Read (X8 bit)
V_IL V_IL X
V_IL
Output disable (X16 bit) V_IL V_IH X
V_IH
Output disable (X8 bit)
V_IL V_IH X
V_IL
V_CC Dout
V_CC Dout
V_CC High-Z
V_CC High-Z
Dout
High-Z
High-Z
High-Z
Dout
V_IH/V_IL
High-Z
V_IH/V_IL
3