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HN27C4000G Datasheet, PDF (11/20 Pages) Hitachi Semiconductor – 524288-Word ®8-Bit/262144-Word X 16-Bit CMOS UV Erasable and Programmable ROM
HN27C4000G Series
AC Characteristics (VCC = 6.25 V ± 0.25 V, VPP = 12.5 V ± 0.3 V, Ta = 25°C ± 5°C)
Test Conditions
• Input pulse levels: 0.45 to 2.4 V
• Input rise and fall times: ≤ 20 ns
• Reference levels for measuring timing: Inputs; 0.8 V, 2.0 V,
Outputs; 0.8 V, 2.0 V
Item
Symbol
Min
Typ
Max Unit Test conditions
Address setup time
OE setup time
Data setup time
Address hold time
Data hold time
OE high to output float delay
VPP setup time
tAS
tOES
tDS
tAH
tDH
tDF*1
tVPS
2
—
—
µs
2
—
—
µs
2
—
—
µs
0
—
—
µs
2
—
—
µs
0
—
130
ns
2
—
—
µs
VCC setup time
CE initial programming
pulse width
tVCS
tPW
2
—
—
µs
47.5 50.0 52.5 µs
CE setup time
Data valid from OE
CE pulse width during data latch
OE = VH setup time
OE = VH hold time
VPP hold time*2
tCES
tOE
tLW
tOHS
tOHH
tVRS
2
—
—
µs
0
—
150
ns
1
—
—
µs
2
—
—
µs
2
—
—
µs
1
—
—
µs
Notes: 1. tDF is defined as the time at which the output achieves the open circuit condition and data is no
longer driven.
2. Page program mode will be reset when VPP is set to VCC or less.
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