GS8161E18 Datasheet, PDF (9/36 Pages) GSI Technology – 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs

GS8161E18(T/D)/GS816132(D)/GS816136(T/D)
GS8161E18(T/D)/GS8161E32(D)/GS8161E36(T/D) Block Diagram
A0–An
LBO
ADV
CK
ADSC
ADSP
GW
BW
BA
BB
BC
BD
Register
DQ
A0
A1
A0
D0
Q0 _A1
D1
Q1
Counter
Load
Register
DQ
Register
DQ
Register
DQ
Register
DQ
Register
DQ
Register
E1
DQ
Register
DQ
FT
G
Power Down
0
ZZ
Control
Note: Only x36 version shown for simplicity.
A
Memory
Array
Q
36
D
36
4
4
36
36
36
DQx1–DQx9
36
36
4
32
Parity
Encode
4
Parity
Compare
NC
NC
Rev: 2.13 11/2004
9/36
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, GSI Technology