GS8161E18 Datasheet, PDF (20/36 Pages) GSI Technology – 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs

GS8161E18(T/D)/GS816132(D)/GS816136(T/D)
AC Electrical Characteristics
Parameter
-250
-225
-200
-166
-150
-133
Symbol
Unit
Min Max Min Max Min Max Min Max Min Max Min Max
Clock Cycle Time
tKC 4.0 — 4.4 — 5.0 — 6.0 — 6.7 — 7.5 — ns
Clock to Output Valid tKQ — 2.5 — 2.7 — 3.0 — 3.4 — 3.8 — 4.0 ns
Clock to Output Invalid tKQX
Pipeline
Clock to Output in Low-Z _tLZ¹
1.5 — 1.5 — 1.5 — 1.5 — 1.5 — 1.5 — ns
1.5 — 1.5 — 1.5 — 1.5 — 1.5 — 1.5 — ns
Setup time
tS
1.2 — 1.3 — 1.4 — 1.5 — 1.5 — 1.5 — ns
Hold time
tH 0.2 — 0.3 — 0.4 — 0.5 — 0.5 — 0.5 — ns
Clock Cycle Time
tKC 5.5 — 6.0 — 6.5 — 7.0 — 7.5 — 8.5 — ns
Clock to Output Valid tKQ — 5.5 — 6.0 — 6.5 — 7.0 — 7.5 — 8.5 ns
Flow ^{Clock to Output Invalid tKQX}
Through _{Clock to Output in Low-Z tLZ}1
3.0 — 3.0 — 3.0 — 3.0 — 3.0 — 3.0 — ns
3.0 — 3.0 — 3.0 — 3.0 — 3.0 — 3.0 — ns
Setup time
tS
1.5 — 1.5 — 1.5 — 1.5 — 1.5 — 1.5 — ns
Hold time
tH 0.5 — 0.5 — 0.5 — 0.5 — 0.5 — 0.5 — ns
Clock HIGH Time
tKH 1.3 — 1.3 — 1.3 — 1.3 — 1.5 — 1.7 — ns
Clock LOW Time
tKL 1.5 — 1.5 — 1.5 — 1.5 — 1.7 — 2 — ns
Clock to Output in
High-Z
tHZ^{1 1.5 2.3 1.5 2.5 1.5 3.0 1.5 3.0 1.5 3.0 1.5 3.0 ns}
G to Output Valid
tOE — 2.3 — 2.5 — 3.2 — 3.5 — 3.8 — 4.0 ns
G to output in Low-Z _tOLZ¹ 0 — 0 — 0 — 0 — 0 — 0 — ns
G to output in High-Z _tOHZ¹ — 2.3 — 2.5 — 3.0 — 3.0 — 3.0 — 3.0 ns
ZZ setup time
tZZS^{2 5 — 5 — 5 — 5 — 5 — 5 — ns}
ZZ hold time
tZZH^{2 1 — 1 — 1 — 1 — 1 — 1 — ns}
ZZ recovery
tZZR 20 — 20 — 20 — 20 — 20 — 20 — ns
Notes:
1. These parameters are sampled and are not 100% tested.
2. ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
Rev: 2.13 11/2004
20/36
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, GSI Technology