GS82032AT Datasheet, PDF (6/22 Pages) GSI Technology – 64K x 32 2Mb Synchronous Burst SRAM

GS82032AT-180/166/150/133/100/66/4/5/6
Byte Write Truth Table
Function
GW
BW
BA
BB
BC
BD
Notes
Read
H
H
X
X
X
X
1
Read
H
L
H
H
H
H
1
Write byte A
H
L
L
H
H
H
2, 3
Write byte B
H
L
H
L
H
H
2, 3
Write byte C
H
L
H
H
L
H
2, 3, 4
Write byte D
H
L
H
H
H
L
2, 3, 4
Write all bytes
H
L
L
L
L
L
2, 3, 4
Write all bytes
L
X
X
X
X
X
Notes:
1. All byte outputs are active in read cycles regardless of the state of Byte Write Enable inputs.
2. Byte Write Enable inputs BA, BB, BC and/or BD may be used in any combination with BW to write single or multiple bytes.
3. All byte I/Os remain High-Z during all write operations regardless of the state of Byte Write Enable inputs.
Rev: 1.12 10/2004
6/22
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2000, GSI Technology