GS82032AT Datasheet, PDF (15/22 Pages) GSI Technology – 64K x 32 2Mb Synchronous Burst SRAM

GS82032AT-180/166/150/133/100/66/4/5/6
Pipeline Mode Timing
Begin
Read A Cont
Single Read
Cont
CK
Deselect Write B
Single Write
tKL
tKH
tKC
Read C
Read C+1 Read C+2 Read C+3 Cont
Burst Read
Deselect
ADSP
ADSC
ADV
A0–An
GW
BW
Ba–Bd
E1
E2
E3
tS
tH
tS
tS
tH
A
tS
tS
tS
tS
tH
tS
tH
ADSC initiated read
tH
B
C
tH
tH
tS
tH
E1 masks ADSP
E2 and E3 only sampled with ADSP and ADSC
Deselected with E1
G
DQa–DQd
tOE
tOHZ
Q(A)
tS
tH
D(B)
tKQ
tLZ
Q(C)
Q(C+1)
Q(C+2)
tKQX
tHZ
Q(C+3)
Rev: 1.12 10/2004
15/22
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2000, GSI Technology