GS8160EV18AT Datasheet, PDF (5/24 Pages) GSI Technology – 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs

TQFP Pin Description
Symbol
Type
A0, A1
I
A
I
DQA
DQB
DQC
I/O
DQD
NC
—
BW
I
BA, BB, BC, BD
I
CK
I
GW
I
E1
I
E2
I
E3
I
G
I
ADV
I
ADSP, ADSC
I
ZZ
I
LBO
I
V_DD
I
V_SS
I
V_DDQ
I
Preliminary
GS8160EV18/32/36AT-350/333/300/250/225/200/150
Description
Address field LSBs and Address Counter preset Inputs
Address Inputs
Data Input and Output pins
No Connect
Byte Write—Writes all enabled bytes; active low
Byte Write Enable for DQA, DQB Data I/Os; active low
Clock Input Signal; active high
Global Write Enable—Writes all bytes; active low
Chip Enable; active low
Chip Enable; active high
Chip Enable; active low
Output Enable; active low
Burst address counter advance enable; active low
Address Strobe (Processor, Cache Controller); active low
Sleep Mode control; active high
Linear Burst Order mode; active low
Core power supply
I/O and Core Ground
Output driver power supply
Rev: 1.00a 6/2003
5/24
© 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.