GS8160EV18AT Datasheet, PDF (17/24 Pages) GSI Technology – 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs

Preliminary
GS8160EV18/32/36AT-350/333/300/250/225/200/150
AC Electrical Characteristics
Pipeline
Flow
Through
Parameter
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
Clock to Output in Low-Z
Setup time
Hold time
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
Clock to Output in Low-Z
Setup time
Hold time
Clock HIGH Time
Clock LOW Time
Clock to Output in
High-Z
G to Output Valid
G to output in Low-Z
G to output in High-Z
ZZ setup time
ZZ hold time
ZZ recovery
Symbol
tKC
tKQ
tKQX
tLZ¹
tS
tH
tKC
tKQ
tKQX
tLZ¹
tS
tH
tKH
tKL
tHZ¹
tOE
tOLZ¹
tOHZ¹
tZZS²
tZZH²
tZZR
-350
Min Max
2.85 —
— 1.8
1.0 —
1.0 —
1.0 —
0.1 —
4.5 —
— 4.5
3.0 —
3.0 —
1.3 —
0.3 —
1.0 —
1.2 —
1.0 1.8
— 1.8
0
—
— 1.8
5
—
1
—
20 —
-333
Min Max
3.0 —
— 2.0
1.0 —
1.0 —
1.0 —
0.1 —
4.7 —
— 4.7
3.0 —
3.0 —
1.4 —
0.4 —
1.0 —
1.2 —
1.0 2.0
— 2.0
0
—
— 2.0
5
—
1
—
20 —
-300
Min Max
3.3 —
— 2.2
1.0 —
1.0 —
1.0 —
0.1 —
5.0 —
— 5.0
3.0 —
3.0 —
1.4 —
0.4 —
1.3 —
1.5 —
1.0 2.2
— 2.2
0
—
— 2.2
5
—
1
—
20 —
-250
Min Max
4.0 —
— 2.3
1.0 —
1.0 —
1.2 —
0.2 —
5.5 —
— 5.5
3.0 —
3.0 —
1.5 —
0.5 —
1.3 —
1.5 —
1.0 2.3
— 2.3
0
—
— 2.3
5
—
1
—
20 —
-200
-150
Unit
Min Max Min Max
5.0 — 6.7 — ns
— 2.7 — 3.3 ns
1.0 — 1.0 — ns
1.0 — 1.0 — ns
1.4 — 1.5 — ns
0.4 — 0.5 — ns
6.5 — 7.5 — ns
— 6.5 — 7.5 ns
3.0 — 3.0 — ns
3.0 — 3.0 — ns
1.5 — 1.5 — ns
0.5 — 0.5 — ns
1.3 — 1.5 — ns
1.5 — 1.7 — ns
1.0 2.7 1.0 3.0 ns
— 2.7 — 3.3 ns
0
—0
—
ns
— 2.7 — 3.0 ns
5
—5
—
ns
1
—1
—
ns
20 — 20 — ns
Notes:
1. These parameters are sampled and are not 100% tested.
2. ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
Rev: 1.00a 6/2003
17/24
© 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.