GS81314LT19 Datasheet, PDF (5/42 Pages) GSI Technology – 144Mb SigmaDDR-IVe™ Burst of 2 Single-Bank ECCRAM™

GS81314LT19/37GK-933/800
Symbol
PZT[1:0]
V_DD
V_DDQ
V_REF
V_SS
TCK
TMS
TDI
TDO
MCH
MCL
NC
NU_I
NU_IO
Description
ODT Configuration Select — Set the default ODT state for various combinations of input groups during
power-up and reset, when MZT[1:0] = 01 or 10. Must be tied High or Low.
PZT[1:0] = 00: enables ODT on write data only.
PZT[1:0] = 01: enables ODT on write data and input clocks.
PZT[1:0] = 10: enables ODT on write data, address, and control.
PZT[1:0] = 11: enables ODT on write data, input clocks, address, and control.
Note: The ODT state for each input group can be changed at any time via the Configuration Registers.
Core Power Supply
I/O Power Supply
Input Reference Voltage — Input buffer reference voltage.
Ground
JTAG Clock — Weakly pulled Low internally.
JTAG Mode Select — Weakly pulled High internally.
JTAG Data Input — Weakly pulled High internally.
JTAG Data Output
Must Connect High — May be tied to V_DDQ directly or via a 1k resistor.
Must Connect Low — May be tied to V_SS directly or via a 1k resistor.
No Connect — There is no internal chip connection to these pins. They may be left unconnected, or tied/
driven High or Low.
Not Used Input — There is an internal chip connection to these input pins, but they are unused by the
device. They are pulled Low internally. They may be left unconnected or tied/driven Low. They should not be
tied/driven High.
Not Used Input/Output — There is an internal chip connection to these I/O pins, but they are unused by the
device. The drivers are tri-stated internally. They are pulled Low internally. They may be left unconnected or
tied/driven Low. They should not be tied/driven High.
Type
Input
—
—
—
—
Input
Input
Input
Output
Input
Input
—
Input
I/O
Rev: 1.02 3/2016
5/42
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2015, GSI Technology