GS2962 Datasheet, PDF (59/82 Pages) Gennum Corporation – Integrated Narrow-Bandwidth PLL

This requirement is met regardless of the output slew rate setting of the device.
This requirement is met across all ambient temperature and power supply operating
conditions described in the Electrical Characteristics on page 15.
This requirement is summarized in Table 4-9:
Table 4-9: Serial Digital Output - Overshoot/Undershoot
Parameter
Symbol
Conditions
Min
Typ
Serial output overshoot /undershoot
−
−
−
0
4.9.3 Slew Rate Selection
The GS2962 supports two user-selectable output slew rates.
Control of the slew rate is determined by the setting of the RATE_SEL0 input pin.
When this pin is set HIGH, the output slew rate matches the requirements as defined by
the SMPTE 259M-C standard.
When this pin is set LOW, the output slew rate is better than the requirements as defined
by the SMPTE 424M standard.
These requirements is met across all ambient temperature and power supply operating
conditions described in the Electrical Characteristics on page 15.
This requirement is summarized in Table 4-10:
Table 4-10: Serial Digital Output - Rise/Fall Time
Parameter
Symbol
Conditions
Min
Typ
Serial Output Rise/Fall Time
SDO_TR
SMPTE 292/424M signal
−
−
20% ~ 80%
SMPTE 259M-C signal
400
−
4.9.4 Serial Digital Output Mute
When the SDO_EN/DIS pin is LOW, the serial digital output signals of the device become
high-impedance, reducing system power.
The serial digital output is also placed in the high-impedance state when the LOCKED
pin is LOW, or when the STANDBY pin is HIGH.
4.10 Serial Clock PLL
An internal VCO provides the transmission clock rates for the GS2962.
The power supply to the VCO is provided to the VCO_VDD/VCO_GND pins of the
device.
This VCO is locked to the input PCLK via an on-chip PLL and Charge Pump.
GS2962 3G/HD/SD-SDI Serializer with Complete
SMPTE Video Support
Data Sheet
48005 - 7
October 2010
Max
7
Units
%
Max
135
800
Units
ps
ps
59 of 82