MB82DP02183D Datasheet, PDF (9/33 Pages) Fujitsu Component Limited. – 32M Bit (2 M word × 16 bit) Mobile Phone Application Specific Memory

MB82DP02183D-65L
(2) WRITE OPERATION
(At recommended operating conditions unless otherwise noted.)
Parameter
Symbol
Value
Min
Max
Unit Notes
Write Cycle Time
tWC
65
1000
ns *1, *2
Address Setup Time
tAS
0
⎯
ns *3
CE1 Write Pulse Width
tCW
40
⎯
ns *3
WE Write Pulse Width
tWP
40
⎯
ns *3
LB, UB Write Pulse Width
tBW
40
⎯
ns *3
LB, UB Byte Mask Setup Time
tBS
−5
⎯
ns *4
LB, UB Byte Mask Hold Time
tBH
−5
⎯
ns *5
Write Recovery Time
tWR
0
⎯
ns *6
CE1 High Pulse Width
tCP
10
⎯
ns
WE High Pulse Width
tWHP
10
1000
ns
LB, UB High Pulse Width
tBHP
10
1000
ns
Data Setup Time
tDS
12
⎯
ns
Data Hold Time
tDH
0
⎯
ns
OE High to CE1 Low Setup Time for Write
tOHCL
−5
⎯
ns *7
OE High to Address Setup Time for Write
tOES
0
⎯
ns *8
LB and UB Write Pulse Overlap
tBWO
40
⎯
ns
*1 : Maximum value is applicable if CE1 is kept at Low without any address change.
*2 : Minimum value must be equal or greater than the sum of write pulse (tCW, tWP or tBW) and write recovery
time (tWR).
*3 : Write pulse is defined from High to Low transition of CE1, WE, LB or UB, whichever occurs last.
*4 : Applicable for byte mask only. Byte mask setup time is defined to the High to Low transition of CE1 or WE
whichever occurs last.
*5 : Applicable for byte mask only. Byte mask hold time is defined from the Low to High transition of CE1 or WE
whichever occurs first.
*6 : Write recovery is defined from Low to High transition of CE1, WE, LB or UB, whichever occurs first.
*7 : If OE is Low after minimum tOHCL, read cycle is initiated. In other word, OE must be brought to High within
5 ns after CE1 is brought to Low.
*8 : If OE is Low after new address input, read cycle is initiated. In other word, OE must be brought to High at
the same time or before new address valid.
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