DS07-16303-3E Datasheet, PDF (68/97 Pages) Fujitsu Component Limited. – 32-bit RISC Microcontroller CMOS FR30 Series

MB91121
The relation between source oscillation input and CLK pin for configured by CHC/CCK1/CCK0 settings of GCR
(gear control register) is as follows:
However, in this chart source oscillation input means X0 input clock.
Source oscillation input
(when using the doublure)
(1) PLL system
(CHC bit of GCR set to “0”)
(a) Gear × 1 CLK pin
CCK1/0: “00”
tCYC
tCYC
Source oscillation input
(2) 2 dividing system
(CHC bit of GCR set to “1”)
(a) Gear × 1 CLK pin
tCYC
CCK1/0: “00”
(b) Gear × 1/2 CLK pin
CCK1/0: “01”
(c) Gear × 1/4 CLK pin
CCK1/0: “10”
tCYC
tCYC
(d) Gear × 1/8 CLK pin
tCYC
CCK1/0: “11”
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