DS07-16303-3E Datasheet, PDF (67/97 Pages) Fujitsu Component Limited. – 32-bit RISC Microcontroller CMOS FR30 Series

MB91121
(3) Clock Output Timing
Parameter
Symbol
Cycle time
CLK ↑ → CLK ↓
CLK ↓ → CLK ↑
tCYC
tCHCL
tCLCH
Pin
name
CLK
CLK
CLK
(VCC = 3.0 V to 3.6 V, VSS = AVSS = 0.0 V, TA = 0 °C to + 70 °C)
Condition
Min.
Value
Max.
Unit Remarks
tCP
—
*1
tCPB

—
ns _{Using the}
doublure
1 / 2 × tCYC − 10 1 / 2 × tCYC + 10 ns *2
1 / 2 × tCYC − 10 1 / 2 × tCYC + 10 ns *3
CLK
tCHCL
VOH
tCYC
tCLCH
VOL
VOH
*1 : tCYC is a frequency for 1 clock cycle including a gear cycle.
Use the doublure when CPU frequency is above 25 MHz.
*2 : Rating at a gear cycle of × 1.
When a gear cycle of 1/2, 1/4, 1/8 is selected, substitute “n” in the following equations with 1/2, 1/4, 1/8,
respectively.
Min. : (1 − n / 2) × tCYC − 10
Max. : (1 − n / 2) × tCYC + 10
Select a gear cycle of × 1 when using the doublure.
*3 : Rating at a gear cycle of × 1.
When a gear cycle of 1/2, 1/4, 1/8 is selected, substitute “n” in the following equations with 1/2, 1/4, 1/8,
respectively.
Min. : n / 2 × tCYC − 10
Max. : n / 2 × tCYC + 10
Select a gear cycle of × 1 when using the doublure.
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