MB86961A Datasheet, PDF (18/29 Pages) Fujitsu Component Limited. – UNIVERSAL INTERFACE FOR 10BASET

MB86961A
Table 7. RCLK/Start-of-Packet Timing
Symbol
Parameter
t_DATA
Decoder acquisition time
t_CD
CD turn-on delay
t_RDS
Receive data setup from RCLK
t_RDH
Receive data hold from RCLK
AUI
TP
AUI
TP
Mode 1
Modes 2, 3 and 4
Mode 1
Modes 2, 3 and 4
Min.
—
—
—
—
40
30
10
30
Typ.¹
900
1300
50
400
—
—
—
—
Max.
—
—
—
—
—
—
—
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
Note: Typical figures are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.
Table 8. RCLK/End-of-Packet Timing
Symbol
t_RCH
t_RD
t_CDOFF
t_IFG
Parameter
RCLK hold after CD low
RCV data throughput delay
CD turn off delay
Receive block out
Type
Min.
Typ.
Typ.
Typ.
Mode 1
0
300
400
2
Mode 2
1
275
375
50
Mode 3
27
275
375
27
Mode 4
5
275
375
5
Units
bt
ns
ns
bt
Notes: 1. Typical figures are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.
2. CD Turn off delay measured from middle of last bit, so timing specification is unaffected by the value of the
last bit.
Table 9. Transmit Timing
Symbol
Parameter
t_EHCH
t_DSCH
t_CHEL
t_CHDU
TEN setup from TCLK
TXD setup from TCLK
TEN hold after TCLK
TXD hold after TCLK
Min.
—
—
—
—
Typ.¹
30
30
5
5
Max.
—
—
—
—
Units
ns
ns
ns
ns
Note: Typical figures are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.
Table 10. Collision Detection, COL/CI Output and Loopback Timing
Symbol
t_COLD
t_COLOFF
t_SQED
t_SQEP
t_KHEH
t_KHEL
COL turn on delay
COL turn off delay
SQE Delay
SQE Pulse Duration
LBK setup from TEN
LBK hold after TEN
Parameter
Min.
—
—
0.65
500
—
—
Typ.¹
50
160
—
—
25
0
Max.
—
—
1.6
1500
—
—
Units
ns
ns
ms
ns
ns
ns
Note: Typical figures are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.
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