MB15F03 Datasheet, PDF (16/22 Pages) Fujitsu Component Limited. – Dual Serial Input PLL Frequency Synthesizer

MB15F03
s REFERENCE INFORMATION
Typical plots measured with the
test circuit are shown below.
Each plot shows lock up time,
phase noise and reference
leakage.
S.G
Spectrum
Analyzer
Test Circuit
OSCin
Do
LPF
fin
VCO
• fvco = 1835 MHz
• Kv = 87 MHz/v
• fr = 200 kHz
• fosc = 13 MHz
• LPF:
15 kΩ
3000 pF
910 Ω
0.03 µF
400 pF
PLL Lock Up Time = 460 µs
(1797.6 MHz → 1872.4 MHz, within ± 1kHz)
PLL Phase Noise
@ within loop band = 70.1 dBc/Hz
∆ MKr x : 460.02316 µs
y : –74.7998 MHz
30.00500
MHz
REF 0.0 dBm ATT 10 dB
10dB/
2.000
kHz/div
29.99500
MHz
10.1307 µs
1.9903807 ms
RBW
300 Hz
VBW
300 Hz
SPAN 50.0 kHz CENTER 1.8350000 GH z
∆ MKr x : 460.02316 µs
y : –74.7998 MHz
250.0000
MHz
50.00000
MHz/div
0
Hz
10.1307 µs
1.9903807 ms
PLL Reference Leakage
@ 200 kHz offset = 59 dBc
REF 0.0 dBm ATT 10 dB
10dB/
RBW
10 kHz
VBW
10 kHz
SPAN 1.00 MHz CENTER 1.8350000 GHz
16