MB15F03 Datasheet, PDF (10/22 Pages) Fujitsu Component Limited. – Dual Serial Input PLL Frequency Synthesizer

MB15F03
Table. 7 Phase Comparator Phase Switching Data Setting
FC = H
FC = L
fr > fp
H
L
fr = fp
Z
Z
fr < fp
L
H
VCO polarity
(1)
(2)
VCO Output
Frequency
Note: • Z = High–impedance
• Depending upon the VCO and LPF polarity,
FC bit should be set.
Table. 8 LD/fout Output Select Data Setting
LDS
LD/fout output signal
H
fout (frIF/RF, fpIF/RF) signals
L
LD signal
Serial Data Input Timing
(1)
(2)
VCO Input Voltage
Data
MSB
LSB
Clock
LE
t1
t7
t5
t2
t3
t6
t4
On rising edge of the clock, one bit of the data is transferred into the shift
Parameter Min Typ Max Unit
t1
20
–
–
ns
t2
20
–
–
ns
t3
30
–
–
ns
t4
20
–
–
ns
Parameter Min Typ Max Unit
t5
30
–
–
ns
t6
100
–
–
ns
t7
100
–
–
ns
10