MC68HC908QY2CDW Datasheet, PDF (90/184 Pages) Freescale Semiconductor, Inc – Microcontrollers

Oscillator Module (OSC)
PTA0/AD0/TCH0/KBI0
PTA1/AD1/TCH1/KBI1
PTA2/IRQ/KBI2/TCLK
PTA3/RST/KBI3
PTA4/OSC2/AD2/KBI4
PTA5/OSC1/AD3/KBI5
PTB0
PTB1
PTB2
PTB3
PTB4
PTB5
PTB6
PTB7
8-BIT ADC
128 BYTES RAM
V_DD
POWER SUPPLY
V_SS
M68HC08 CPU
MC68HC908QY4 AND MC68HC908QT4
4096 BYTES
MC68HC908QY2, MC68HC908QY1,
MC68HC908QT2, AND MC68HC908QT1:
1536 BYTES
USER FLASH
CLOCK
GENERATOR
(OSCILLATOR)
SYSTEM INTEGRATION
MODULE
SINGLE INTERRUPT
MODULE
BREAK
MODULE
POWER-ON RESET
MODULE
KEYBOARD INTERRUPT
MODULE
16-BIT TIMER
MODULE
COP
MODULE
MONITOR ROM
RST, IRQ: Pins have internal (about 30K Ohms) pull up
PTA[0:5]: High current sink and source capability
PTA[0:5]: Pins have programmable keyboard interrupt and pull up
PTB[0:7]: Not available on 8-pin devices – MC68HC908QT1, MC68HC908QT2, and MC68HC908QT4 (see note in
12.1 Introduction)
ADC: Not available on the MC68HC908QY1 and MC68HC908QT1
Figure 11-1. Block Diagram Highlighting OSC Block and Pins
11.3.1 Internal Oscillator
The internal oscillator circuit is designed for use with no external components to provide a clock source
with tolerance less than ±25% untrimmed.An 8-bit trimming register allows adjustment to a tolerance of
less than ±5%.
The internal oscillator will generate a clock of 12.8 MHz typical (INTCLK) resulting in a bus speed (internal
clock ÷ 4) of 3.2 MHz. 3.2 MHz came from the maximum bus speed guaranteed at 3 V which is 4
MHz.Since the internal oscillator will have a ±25% tolerance (pre-trim), then the +25% case should not
allow a frequency higher than 4 MHz:
3.2 MHz + 25% = 4 MHz
Figure 11-3 shows how BUSCLKX4 is derived from INTCLK and, like the RC oscillator, OSC2 can output
BUSCLKX4 by setting OSC2EN in PTAPUE register. See Chapter 12 Input/Output Ports (PORTS)
MC68HC908QY/QT Family Data Sheet, Rev. 6
90
Freescale Semiconductor