MC68HC908QY2CDW Datasheet, PDF (51/184 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output Registers
4.6 Input/Output Registers
The AWU shares registers with the keyboard interrupt (KBI) module and the port A I/O module. The
following I/O registers control and monitor operation of the AWU:
• Port A data register (PTA)
• Keyboard interrupt status and control register (KBSCR)
• Keyboard interrupt enable register (KBIER)
4.6.1 Port A I/O Register
The port A data register (PTA) contains a data latch for the state of the AWU interrupt request, in addition
to the data latches for port A.
Address: $0000
Bit 7
Read: 0
Write:
Reset: 0
6
AWUL
5
PTA5
0
= Unimplemented
4
PTA4
3
PTA3
2
PTA2
Unaffected by reset
1
PTA1
Bit 0
PTA0
Figure 4-2. Port A Data Register (PTA)
AWUL — Auto Wakeup Latch
This is a read-only bit which has the value of the auto wakeup interrupt request latch. The wakeup
request signal is generated internally. There is no PTA6 port or any of the associated bits such as
PTA6 data direction or pullup bits.
1 = Auto wakeup interrupt request is pending
0 = Auto wakeup interrupt request is not pending
NOTE
PTA5–PTA0 bits are not used in conjuction with the auto wakeup feature.
To see a description of these bits, see 12.2.1 Port A Data Register.
4.6.2 Keyboard Status and Control Register
The keyboard status and control register (KBSCR):
• Flags keyboard/auto wakeup interrupt requests
• Acknowledges keyboard/auto wakeup interrupt requests
• Masks keyboard/auto wakeup interrupt requests
Address: $001A
Bit 7
Read: 0
Write:
Reset: 0
6
5
0
0
0
0
= Unimplemented
4
3
2
1
Bit 0
0
KEYF
0
IMASKK MODEK
ACKK
0
0
0
0
0
Figure 4-3. Keyboard Status and Control Register (KBSCR)
MC68HC908QY/QT Family Data Sheet, Rev. 6
Freescale Semiconductor
51