MC68HC908QY2CDW Datasheet, PDF (28/184 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory
Addr.
$0006
↓
$000A
Register Name
Unimplemented
Unimplemented
Bit 7
6
5
4
3
2
1
Bit 0
$000B
$000C
$000D
↓
$0019
Port A Input Pullup Enable
Register (PTAPUE)
See page 99.
Port B Input Pullup Enable
Register (PTBPUE)
See page 102.
Read:
OSC2EN
Write:
Reset: 0
Read:
PTBPUE7
Write:
Reset: 0
Unimplemented
0
0
PTBPUE6
0
PTAPUE5
0
PTBPUE5
0
PTAPUE4
0
PTBPUE4
0
PTAPUE3
0
PTBPUE3
0
PTAPUE2
0
PTBPUE2
0
PTAPUE1
0
PTBPUE1
0
PTAPUE0
0
PTBPUE0
0
Keyboard Status and ^{Read: 0}
$001A Control Register (KBSCR) Write:
See page 83. _{Reset: 0}
Keyboard Interrupt ^{Read: 0}
$001B Enable Register (KBIER) Write:
See page 84. _{Reset: 0}
$001C
Unimplemented
0
0
0
AWUIE
0
0
KBIE5
0
0
0
KBIE4
0
KEYF
0
KBIE3
0
0
ACKK
0
KBIE2
0
IMASKK
0
KBIE1
0
MODEK
0
KBIE0
0
IRQ Status and Control ^{Read: 0}
0
0
0
IRQF
0
$001D
Register (INTSCR) Write:
ACK
See page 77. _{Reset: 0}
0
0
0
0
0
$001E
Configuration Register 2
(CONFIG2)⁽¹⁾
See page 53.
Read:
Write:
Reset:
IRQPUD
0
IRQEN
0
R OSCOPT1 OSCOPT0 R
0
0
0
0
1. One-time writable register after each reset.
2. RSTEN reset to 0 by a power-on reset (POR) only.
IMASK
0
R
0
MODE
0
RSTEN
0⁽²⁾
$001F
Configuration Register 1
(CONFIG1)⁽¹⁾
See page 54.
Read:
Write:
Reset:
COPRS
0
LVISTOP LVIRSTD LVIPWRD LVI5OR3
0
0
0
0⁽²⁾
1. One-time writable register after each reset.
2. LVI5OR3 reset to 0 by a power-on reset (POR) only.
SSREC
0
STOP
0
COPD
0
TIM Status and Control ^{Read: TOF}
TOIE TSTOP
0
0
$0020
Register (TSC) Write: 0
TRST
See page 127. _{Reset: 0}
0
1
0
0
PS2
PS1
PS0
0
0
0
TIM Counter Register High ^{Read: Bit 15}
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
$0021
(TCNTH) Write:
See page 128. _{Reset: 0}
0
0
0
0
0
0
0
= Unimplemented
R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 5)
MC68HC908QY/QT Family Data Sheet, Rev. 6
28
Freescale Semiconductor