PXS20PB Datasheet, PDF (9/30 Pages) Freescale Semiconductor, Inc – 32-bit Power Architecture® Microcontrollers for Highly Reliable

Features
2.5.1 High-Performance e200z4d Core
The e200z4d Power Architecture^® core provides the following features:
• 2 independent execution units, both supporting fixed-point and floating-point operations
• Dual issue 32-bit Power Architecture^® technology compliant
— 5-stage pipeline (IF, DEC, EX1, EX2, WB)
— In-order execution and instruction retirement
• Full support for Power Architecture^® instruction set and Variable Length Encoding (VLE)
— Mix of classic 32-bit and 16-bit instruction allowed
— Optimization of code size possible
• Thirty-two 64-bit general purpose registers (GPRs)
• Harvard bus (32-bit address, 64-bit data)
— I-Bus interface capable of one outstanding transaction plus one piped with no wait-on-data
return
— D-Bus interface capable of two transactions outstanding to fill AHB pipe
• I-cache and I-cache controller
— 4 KB, 256-bit cache line (programmable for 2- or 4-way)
• No data cache
• 16-entry MMU
• 8-entry branch table buffer
• Branch look-ahead instruction buffer to accelerate branching
• Dedicated branch address calculator
• 3 cycles worst case for missed branch
• Load/store unit
— Fully pipelined
— Single-cycle load latency
— Big- and little-endian modes supported
— Misaligned access support
— Single stall cycle on load to use
• Single-cycle throughput (2-cycle latency) integer 32 × 32 multiplication
• 4 – 14 cycles integer 32 × 32 division (average division on various benchmark of nine cycles)
• Single precision floating-point unit
— 1 cycle throughput (2-cycle latency) floating-point 32 × 32 multiplication
— Target 9 cycles (worst case acceptable is 12 cycles) throughput floating-point 32 × 32 division
— Special square root and min/max function implemented
• Signal processing support: APU-SPE 1.1
— Support for vectorized mode: as many as two floating-point instructions per clock
• Vectored interrupt support
PXS20 Product Brief, Rev. 1
Freescale Semiconductor
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