PXS20PB Datasheet, PDF (19/30 Pages) Freescale Semiconductor, Inc – 32-bit Power Architecture® Microcontrollers for Highly Reliable

Features
— Extended data and remote frames
— 0 to 8 bytes data length
— Programmable bit rate as fast as 1Mbit/s
• 32 message buffers of 0 to 8 bytes data length
• Each message buffer configurable as receive or transmit buffer, all supporting standard and
extended messages
• Programmable loop-back mode supporting self-test operation
• 3 programmable mask registers
• Programmable transmit-first scheme: lowest ID or lowest buffer number
• Time stamp based on 16-bit free-running timer
• Global network time, synchronized by a specific message
• Maskable interrupts
• Independent of the transmission medium (an external transceiver is assumed)
• High immunity to EMI
• Short latency time due to an arbitration scheme for high-priority messages
• Transmit features
— Supports configuration of multiple mailboxes to form message queues of scalable depth
— Arbitration scheme according to message ID or message buffer number
— Internal arbitration to guarantee no inner or outer priority inversion
— Transmit abort procedure and notification
• Receive features
— Individual programmable filters for each mailbox
— 8 mailboxes configurable as a 6-entry receive FIFO
— 8 programmable acceptance filters for receive FIFO
• Programmable clock source
— System clock
— Direct oscillator clock to avoid FMPLL jitter
2.5.27 FlexRay
The FlexRay module provides the following features:
• Full implementation of FlexRay Protocol Specification 2.1 Rev. A
• 64 configurable message buffers can be handled
• Dual channel or single channel mode of operation, each as fast as 10 Mbit/s data rate
• Message buffers configurable as transmit or receive
• Message buffer size configurable
• Message filtering for all message buffers based on Frame ID, cycle count, and message ID
• Programmable acceptance filters for receive FIFO
PXS20 Product Brief, Rev. 1
Freescale Semiconductor
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