PXS20PB Datasheet, PDF (27/30 Pages) Freescale Semiconductor, Inc – 32-bit Power Architecture® Microcontrollers for Highly Reliable

Developer Support
The development support provided includes program trace, data trace, watchpoint trace, ownership trace,
run-time access to the MCUs internal memory map and access to the Power Architecture^® internal
registers during halt. The Nexus interface also supports a JTAG only mode using only the JTAG pins. The
following features are implemented:
• Full and reduced port modes
• MCKO (message clock out) pin
• 4 or 12 MDO (message data out) pins¹
• 2 MSEO (message start/end out) pins
• EVTO (event out) pin
— Auxiliary input port
• EVTI (event in) pin
• 5-pin JTAG port (JCOMP, TDI, TDO, TMS, and TCK)
— Supports JTAG mode
• Host processor (e200) development support features
— Data trace via data write messaging (DWM) and data read messaging (DRM). This allows the
development tool to trace reads or writes, or both, to selected internal memory resources.
— Ownership trace via ownership trace messaging (OTM). OTM facilitates ownership trace by
providing visibility of which process ID or operating system task is activated. An ownership
trace message is transmitted when a new process/task is activated, allowing development tools
to trace ownership flow.
— Program trace via branch trace messaging (BTM). Branch trace messaging displays program
flow discontinuities (direct branches, indirect branches, exceptions, etc.), allowing the
development tool to interpolate what transpires between the discontinuities. Thus, static code
may be traced.
— Watchpoint messaging (WPM) via the auxiliary port
— Watchpoint trigger enable of program and/or data trace messaging
— Data tracing of instruction fetches via private opcodes
3 Developer Support
This family of MCUs is suppported by Freescale's Tower Development System as well as a broad set of
advanced debug and runtime software:
• CodeWarrior
• FreeMaster
• MQX
• RAppID Init
• RAppID Toolbox
1. 4 MDO pins on 144 LQFP package, 12 MDO pins on 257 MAPBGA package.
PXS20 Product Brief, Rev. 1
Freescale Semiconductor
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