33810_11 Datasheet, PDF (9/37 Pages) Freescale Semiconductor, Inc – Automotive Engine Control IC Quad injector driver with Parallel/SPI control

ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions of 3.0 V ≤ VDD ≤ 5.5 V, 6.0 V ≤ VPWR ≤ 32 V, -40°C ≤ TC ≤ 125°C, and calibrated
timers, unless otherwise noted. Where typical values reflect the parameter’s approx. average value with VPWR = 13 V, TA =
25°C.
Characteristic
Symbol
Min
Typ
Max
Unit
Notes
10. This parameter is guaranteed by design, however is not production tested.
11. Assuming Ideal external 10:1 Voltage Divider. Tolerance of 10:1 Voltage Divider is not included. Voltage is measured on the High End
of Divider - not at the pin. 10:1 N.3.A 10:1 Voltage Divider is produced using two resistors with a 9:1 resistance ratio by the basic formula:
V-----O-----U-----T-- _{= --------}R_-----1_---------
VIN R1 + R2
Where R2 = 9XR1
CURRENT SENSE COMPARATOR (RSP, RSN) (CONTINUED)
MAXI Trip Threshold Accuracy
Steady State Condition
6.0 A across 0.02 Ω (RSP - RSN = 120 mV)
21 A across 0.04 Ω (RSP - RSN = 840 mV)
7.5
%
MAXI_TRIPTA
–
-7.5
MAXI Trip Point During Overlapping Dwell
Input Bias Current
RSP and RSN
MAXI_TRIPOD
-35
–
+35
%
I_BIASRSX
–
50
µA
-50
Comparator Hysteresis Voltage
NOMI
MAXI
Input Voltage Range (Maximum voltage between RSN and RSP)⁽¹²⁾
Ground Offset Voltage Range⁽¹²⁾
Maximum offset between RSN pin and IC Ground (Exposed Pad)
NOMI_HYS
40
–
70
% of VT
MAXII_HYS
40
–
70
VCMVR_CMVR
0.0
–
2.0
V
VGND_OVR
-0.3
–
0.3
V
GENERAL PURPOSE GATE DRIVER PARAMETERS (GD 0:3)
Gate Drive Sink and Source Current
Gate Drive Output Voltage
I_GD = 1.0 mA
I_GD = -1.0 mA
Short to Battery Fault Detection Voltage Threshold
V_DD = 5.0 V, Outputs Programmed ON
Programmable from 0.5 to 3.0 V in 0.5 V increments. (Table 14)
Open Fault Detection Voltage Threshold (referenced to IC ground tab)
V_DD = 5.0 V, Outputs Programmed OFF
Output OFF Open Load Detection Current
FBx = 18 V, Outputs Programmed OFF
Output Clamp Voltage
Driver Command Off, Clamp Enabled, V_GATE = 2.0 V
I_GD
1.0
2.0
5
mA
V _{GS (ON)}
4.8
7.0
9.0
V
V _{GS (OFF)}
0.0
0.2
0.5
V
V_DS(FLT-TH)
-35%
V
+35%
V_DS(FLT-TH)
V
2.0
2.5
3.0
I_FBX(FLT-SNS)
50
μA
75
120
V_OC
V
48
53
58
DIGITAL INTERFACE
Input Logic High-voltage Thresholds
Input Logic Low-voltage Thresholds
Input Logic-voltage Hysteresis
Input Logic Capacitance
Sleep Mode Input Logic Current
V_DD = 0 V
V_IH
0.7 x V_DD
–
V_DD + 0.3
V
V_IL
GND - 0.3
–
0.2 x V_DD
V
V_HYS
100
–
400
mV
C_IN
–
–
20
pF
I _{LOGIC_SS}
μA
-10
–
10
Analog Integrated Circuit Device Data
Freescale Semiconductor
33810
9