33810_11 Datasheet, PDF (3/37 Pages) Freescale Semiconductor, Inc – Automotive Engine Control IC Quad injector driver with Parallel/SPI control

PIN CONNECTIONS
PIN CONNECTIONS
OUT0
1
FB0
2
GD0
3
CS
4
SCLK
5
SI
6
SO
7
VDD
8
OUTEN
9
DIN0
10
DIN1
11
DIN2
12
DIN3
13
GD1
14
FB1
15
OUT1
16
32
OUT2
31
FB2
30
GD2
29
MAXI
28
NOMI
27
RSN
26
RSP
GND
25
24
VPWR
GIN0
23
GIN1
22
GIN2
21
GIN3
20
SPKDUR
19
GD3
18
FB3
17
OUT3
Figure 3. 33810 Pin Connections
Table 1. 33810 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 15.
Pin Number Pin Name Pin Function Formal Name
Definition
8
VDD
Input
Digital Logic Supply ^{The VDD input supply voltage determines the interface voltage levels}
Voltage
between the device and the MCU, and is used to supply power to the
Serial Out buffer (SO), SPKDUR buffer, MAXI, NOMI, and pull-up current
source for the Chip Select (CS).
6
SI
Input
Serial Input Data ^{The SI input pin is used to receive serial data from the MCU.}
5
SCLK
Input
Serial Clock Input The SCLK input pin is used to clock in and out the serial data on the SI
and SO pins, while being addressed by the CS.
4
CS
Input
Chip Select
The Chip Select input pin is an active low signal sent by the MCU to
indicate that the device is being addressed. This input requires CMOS
logic levels and has an internal active pull-up current source.
7
SO
Output
Serial Output Data ^{The SO output pin is used to transmit serial data from the device to the}
MCU.
10, 11, 12, 13 DIN0,DIN1,
DIN2,DIN3
24, 23, 22, 21 GIN0,GIN1,
GIN2,GIN3
20
SPKDUR
Input
Input
Output
Driver Input 0, Driver ^{Active HIGH input control for injector outputs OUT0 - 3. The parallel input}
Input 1, Driver Input 2, ^{data is logically OR’d with the corresponding SPI input data register}
Driver Input 3
contents.
Gate Driver Input 0
Gate Driver Input 1
Gate Driver Input 2
Gate Driver Input 3
These pins are the active HIGH input control for IGBT/General Purpose
Gate Driver outputs 0 - 3. The parallel input data is logically OR'd with the
corresponding SPI input data register contents in General Purpose Mode
Only.
Spark Duration Output ^{This pin is the Spark Duration Output. This open drain output is low while}
feedback inputs FB0 through FB3 are above the programmed spark
detection threshold.
25
Exposed Pad
(bottom of
package)
VPWR
GND
Input
Ground
Analog Supply Voltage ^{VPWR is the main voltage input for all internal analog bias circuitry.}
Ground
The exposed pad is the only ground reference for analog, digital and
power ground connections. As such, it must be soldered directly to a low
impedance ground plane for both electrical and thermal considerations.
For more information about this package, please see application note
AN2409 on the Freescale Web site, www.freescale.com
Analog Integrated Circuit Device Data
Freescale Semiconductor
33810
3