MC68HC05E5 Datasheet, PDF (88/140 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
Motorola Bus (M Bus) Interface
11.8.3 Software Responses after Transmission or Reception of a Byte
Transmission or reception of a byte will set the data transferring bit
(MCF) to a logic 1, which indicates one byte of communication is
finished. Also, the M-bus interrupt bit (MIF) is set to generate an M-bus
interrupt if the interrupt function is enabled during initialization. Software
must clear the MIF bit in the interrupt routine first. The MCF bit will be
cleared by reading from the M-bus data I/O register (MDR) in receive
mode or writing to MDR in transmit mode. Software may serve the M-bus
I/O in the main program by monitoring the MIF bit if the interrupt function
is disabled.
The following is an example of a software response by a master
transmitter in the interrupt routine. See Figure 11-9.
ISR
BCLR
BRCLR
BRCLR
BRSET
TRANSMIT LDA
STA
1,MSR
5,MCR,SLAVE
4,MCR,RECEIVE
0,MSR,END
DATABUF
MDR
; CLEAR THE MIF FLAG
; CHECK THE MSTA FLAG,
; BRANCH IF SLAVE MODE
; CHECK THE MODE FLAG,
; BRANCH IF IN RECEIVE MODE
; CHECK ACK FROM RECEIVER
; IF NO ACK, END OF
; TRANSMISSION
; GET THE NEXT BYTE OF DATA
; TRANSMIT THE DATA
General Release Specification
Motorola Bus (M Bus) Interface
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MC68HC05E5 — Rev. 1.0