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MC9S12XEP100_07 Datasheet, PDF (864/1430 Pages) Freescale Semiconductor, Inc – Reference Manual Covers MC9S12XE Family
Chapter 23 Voltage Regulator (S12VREGL3V3V1)
0x02F1
R
W
Reset
Field
2
LVDS
1
LVIE
0
LVIF
7
6
5
4
3
2
1
0
0
0
0
0
0
LVDS
LVIE
LVIF
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 23-2. Control Register (VREGCTRL)
Table 23-5. VREGCTRL Field Descriptions
Description
Low-Voltage Detect Status Bit — This read-only status bit reflects the input voltage. Writes have no effect.
0 Input voltage VDDA is above level VLVID or RPM or shutdown mode.
1 Input voltage VDDA is below level VLVIA and FPM.
Low-Voltage Interrupt Enable Bit
0 Interrupt request is disabled.
1 Interrupt will be requested whenever LVIF is set.
Low-Voltage Interrupt Flag — LVIF is set to 1 when LVDS status bit changes. This flag can only be cleared by
writing a 1. Writing a 0 has no effect. If enabled (LVIE = 1), LVIF causes an interrupt request.
0 No change in LVDS bit.
1 LVDS bit has changed.
Note: On entering the Reduced Power Mode the LVIF is not cleared by the VREG_3V3.
MC9S12XE-Family Reference Manual , Rev. 1.14
864
Freescale Semiconductor