MC9S12XEP100_07 Datasheet, PDF (48/1430 Pages) Freescale Semiconductor, Inc – Reference Manual Covers MC9S12XE Family

Chapter 1 Device Overview MC9S12XE-Family
1.2.2 Pin Assignment Overview
Table 1-7 provides a summary of which Ports are available for each package option.
Routing of pin functions is summarized in Table 1-8.
Table 1-9 provides a pin out summary listing the availability of individual pins for each package option.
Table 1-10 provides a list of individual pin functionality
Table 1-7. Port Availability by Package Option
Port
208
MAPBGA
144 LQFP
112 LQFP
Standard
80 QFP
XEA256¹
80 QFP
Port AD/ADC Channels
32/32
24/24
16/16
8/8
12/12
Port A pins
8
8
8
8
4
Port B pins
8
8
8
8
8
Port C pins
8
8
0
0
0
Port D pins
8
8
0
0
0
Port E pins inc. IRQ/XIRQ input only
8
8
8
8
8
Port F
8
0
0
0
0
Port H
8
8
8
0
0
Port J
8
7
4
2
2
Port K
8
8
7
0
0
Port L
8
0
0
0
0
Port M
8
8
8
6
6
Port P
8
8
8
7
7
Port R
8
0
0
0
0
Port S
8
8
8
4
4
Port T
8
8
8
8
8
Sum of Ports
152
119
91
59
59
I/O Power Pairs VDDX/VSSX
7/7
4/4
2/2
2/2
2/2
1^{The 9S12XEA256 is a special bondout for access to extra ADC channels in 80QFP.}
Available in 80QFP / 256K memory size only. WARNING: NOT PIN-COMPATIBLE WITH REST OF FAMILY.
The 9S12XET256 is the standard 256K/80QFP bondout, compatible with other family members.
MC9S12XE-Family Reference Manual , Rev. 1.14
48
Freescale Semiconductor