English
Language : 

K50P121M100SF2V2 Datasheet, PDF (78/79 Pages) Freescale Semiconductor, Inc – K50 Sub-Family
Pinout
1
A
PTD7
2
3
4
PTD5
PTD4/
LLWU_P14
PTC19
5
PTC14
6
PTC13
7
8
9
PTC8
PTC4/
LLWU_P8
PTD9
10
PTD8
11
NC
A
B
PTD10
PTD6/
LLWU_P15
PTD3
PTC18
PTC15
PTC12
PTC7
PTC3/
LLWU_P7
PTC0
PTB16
NC
B
C PTD12
PTD11
PTD2/
LLWU_P13
PTC17
PTC11/
LLWU_P11
PTC10
PTC6/
LLWU_P10
PTC2
PTB19
PTB11
NC
C
D PTD14
PTD13
PTD1
PTD0/
LLWU_P12
PTC16
PTC9
PTC5/
PTC1/
LLWU_P9 LLWU_P6
PTB18
PTB10
PTB8
D
E
PTD15
PTE2/
PTE1/
LLWU_P1 LLWU_P0
PTE0
VDD
VDD
VDD
PTB23
PTB17
PTB9
PTB7
E
F USB0_DP USB0_DM PTE6
PTE3
VDDA
VSSA
VSS
PTB22
PTB21
PTB20
PTB6
F
G VOUT33 VREGIN
VSS
PTE5
VREFH VREFL
VSS
PTB3
PTB2
ADC0_SE16/
H
ADC0_DP1/ ADC0_DM1/
OP0_OUT/
CMP1_IN2/
OP0_DP0 OP0_DM0 ADC0_SE21/
OP0_DP1/
TRI0_DM
TRI1_DM
TRI1_OUT/
CMP2_IN5/
PTE4/
LLWU_P2
ADC1_SE22
PTA1
OP1_DP1
ADC1_SE16/
J
ADC1_DP1/
OP1_DP0/
OP1_DM1
ADC1_DM1/
OP1_DM0
OP1_OUT/
CMP2_IN2/
ADC0_SE22/
OP0_DP2/
TRI0_DP
TRI1_DP
PTA0
PTA2
PTA4/
LLWU_P3
OP1_DP2
DAC1_OUT/ DAC0_OUT/
K
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
TRI0_OUT/
OP1_DM2
CMP0_IN4/
CMP2_IN3/
ADC1_SE23/
OP0_DP5/
CMP1_IN3/
ADC0_SE23/
OP0_DP4/
OP1_DP5
OP1_DP4
L
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
XTAL32
EXTAL32
VBAT
PTA5
PTA12
VSS
RTC_
PTA13/
WAKEUP_B LLWU_P4
1
2
3
4
5
6
7
8
PTA3
PTA10
PTA14
PTA15
9
PTB1
PTB0/
LLWU_P5
G
PTA17
PTA29 H
PTA16 RESET_b J
VSS
PTA19 K
VDD
PTA18 L
10
11
Figure 31. K50 121 MAPBGA Pinout Diagram
K50 Sub-Family Data Sheet, Rev. 1, 6/2012.
78
Preliminary
Freescale Semiconductor, Inc.
General Business Information