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MCIMX53XA Datasheet, PDF (68/180 Pages) Freescale Semiconductor, Inc – i.MX53xA Automotive and Infotainment Applications Processors
Electrical Characteristics
Table 45. Enhanced Serial Audio Interface (ESAI) Timing
No.
Characteristics1’2,3
Symbol Expression3 Min Max Condition4 Unit
62 Clock cycle5
63 Clock high period
• For internal clock
tSSICC
4 × Tc
4 × Tc
30.0 —
30.0 —
—
2 × Tc − 9.0 6
—
i ck
ns
i ck
ns
—
• For external clock
64 Clock low period
• For internal clock
—
2 × Tc
15 —
—
2 × Tc − 9.0 6
—
—
ns
—
• For external clock
65 SCKR rising edge to FSR out (bl) high
—
2 × Tc
15 —
—
—
—
— 17.0
x ck
ns
—
—
— 7.0
i ck a
66 SCKR rising edge to FSR out (bl) low
67 SCKR rising edge to FSR out (wr) high6
68 SCKR rising edge to FSR out (wr) low6
—
—
— 17.0
x ck
ns
—
—
— 7.0
i ck a
—
—
— 19.0
x ck
ns
—
—
— 9.0
i ck a
—
—
— 19.0
x ck
ns
—
—
— 9.0
i ck a
69 SCKR rising edge to FSR out (wl) high
—
—
— 16.0
x ck
ns
—
—
— 6.0
i ck a
70 SCKR rising edge to FSR out (wl) low
—
—
— 17.0
x ck
ns
—
—
— 7.0
i ck a
71 Data in setup time before SCKR (SCK in synchronous
—
mode) falling edge
—
—
12.0 —
x ck
ns
—
19.0 —
i ck
72 Data in hold time after SCKR falling edge
73 FSR input (bl, wr) high before SCKR falling edge6
—
—
3.5 —
x ck
ns
—
—
9.0 —
i ck
—
—
2.0 —
x ck
ns
—
—
12.0 —
i ck a
74 FSR input (wl) high before SCKR falling edge
—
—
2.0 —
x ck
ns
—
—
12.0 —
i ck a
75 FSR input hold time after SCKR falling edge
—
—
2.5 —
x ck
ns
—
—
8.5 —
i ck a
78 SCKT rising edge to FST out (bl) high
—
—
— 18.0
x ck
ns
—
—
— 8.0
i ck
79 SCKT rising edge to FST out (bl) low
80 SCKT rising edge to FST out (wr) high6
81 SCKT rising edge to FST out (wr) low6
—
—
— 20.0
x ck
ns
—
—
— 10.0
i ck
—
—
— 20.0
x ck
ns
—
—
— 10.0
i ck
—
—
— 22.0
x ck
ns
—
—
— 12.0
i ck
i.MX53xA Automotive and Infotainment Applications Processors, Rev. 1
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