MCIMX53XA Datasheet, PDF (44/180 Pages) Freescale Semiconductor, Inc – i.MX53xA Automotive and Infotainment Applications Processors

Electrical Characteristics
Table 30. WATCHDOG_RST Timing Parameters
ID
CC5
Parameter
Duration of WATCHDOG_RESET Assertion
Min
Max
1
—
NOTE
CKIL is approximately 32 kHz. T_CKIL is one period or approximately 30 μs.
Unit
T_CKIL
4.6.3 Clock Amplifier Parameters (CKIH1, CKIH2)
The input to Clock Amplifier (CAMP) is internally ac-coupled allowing direct interface to a square wave
or sinusoidal frequency source. No external series capacitors are required.
Table 31 shows the electrical parameters of CAMP.
Table 31. CAMP Electrical Parameters (CKIH1, CKIH2)
Parameter
Min
Typ
Input frequency
8.0
—
VIL (for square wave input)
VIH (for square wave input)¹
Sinusoidal input amplitude²
0
—
NVCC_CKIH – 0.25
—
0.4
—
Output duty cycle
45
50
1 _{NVCC_CKIH is the supply voltage of CAMP.}
2 _{Minimum value of the sinusoidal input will be determined during characterization.}
Max
40.0
0.3
NVCC_CKIH
VDD
55
Unit
MHz
V
V
Vp-p
%
4.6.4 DPLL Electrical Parameters
Table 32 shows the electrical parameters of digital phase-locked loop (DPLL).
Table 32. DPLL Electrical Parameters
Parameter
Test Conditions/Remarks
Reference clock frequency range¹
—
Reference clock frequency range after
—
pre-divider
Output clock frequency range (dpdck_2)
—
Pre-division factor²
—
Multiplication factor integer part
Multiplication factor numerator³
Multiplication factor denominator²
—
Should be less than denominator
—
Output Duty Cycle
—
Min
Typ
Max
10
—
100
10
—
40
Unit
MHz
MHz
300
—
1
—
5
—
–67108862 —
1
—
48.5
50
1025
16
15
67108862
67108863
51.5
MHz
—
—
—
—
%
i.MX53xA Automotive and Infotainment Applications Processors, Rev. 1
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Freescale Semiconductor