MC9S12XS256RMV1 Datasheet, PDF (65/738 Pages) Freescale Semiconductor, Inc – Reference Manual

2.3.1 Memory Map
Table 2-2 shows the register map of the Port Integration Module.
Table 2-2. Block Memory Map
Port
Offset or
Address
Register
A 0x0000 PORTA—Port A Data Register
B
0x0001 PORTB—Port B Data Register
0x0002 DDRA—Port A Data Direction Register
0x0003 DDRB—Port B Data Direction Register
0x0004
:
0x0007
PIM Reserved
E 0x0008 PORTE—Port E Data Register
0x0009
0x000A
:
0x000B
DDRE—Port E Data Direction Register
Non-PIM address range²
A 0x000C PUCR—Pull-up Control Register
B
E ^{0x000D RDRIV—Reduced Drive Register}
K
0x000E
:
0x001B
Non-PIM address range²
E 0x001C ECLKCTL—ECLK Control Register
0x001D PIM Reserved
0x001E IRQCR—IRQ Control Register
0x001F
0x0020
:
0x0031
PIM Reserved
Non-PIM address range²
K 0x0032 PORTK—Port K Data Register
0x0033
0x0034
:
0x023F
DDRK—Port K Data Direction Register
Non-PIM address range²
Port Integration Module (S12XSPIMV1)
Access Reset Value Section/Page
R/W
0x00
R/W
0x00
R/W
0x00
R/W
0x00
R
0x00
2.3.3/2-75
2.3.4/2-75
2.3.5/2-76
2.3.6/2-76
2.3.7/2-77
R/W¹
R/W¹
-
0x00
0x00
-
2.3.8/2-77
2.3.9/2-78
-
R/W¹
R/W¹
-
0xD0
0x00
-
2.3.10/2-79
2.3.11/2-80
-
R/W¹ 0b³100_0000
R
R/W¹
0x00
0x40
R
0x00
-
-
2.3.12/2-81
2.3.13/2-82
2.3.14/2-83
2.3.15/2-83
-
R/W
0x00
2.3.16/2-84
R/W
0x00
2.3.17/2-84
-
-
-
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
65