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MC9RS08KA2_07 Datasheet, PDF (65/136 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Chapter 8 Central Processor Unit (RS08CPUV1)
8.5 Summary Instruction Table
Instruction Set Summary Nomenclature
The nomenclature listed here is used in the instruction descriptions in Table 8-1 through Table 8-2.
Operators
( ) = Contents of register or memory location shown inside parentheses
â = Is loaded with (read: âgetsâ)
â = Exchange with
& = Boolean AND
| = Boolean OR
â = Boolean exclusive-OR
: = Concatenate
+ = Add
CPU registers
A=
CCR =
PC =
PCH =
PCL =
SPC =
SPCH =
SPCL =
Accumulator
Condition code register
Program counter
Program counter, higher order (most signiï¬cant) six bits
Program counter, lower order (least signiï¬cant) eight bits
Shadow program counter
Shadow program counter, higher order (most signiï¬cant) six bits
Shadow program counter, lower order (least signiï¬cant) eight bits
Memory and addressing
M = A memory location or absolute data, depending on addressing mode
rel =
X=
,X or D[X] =
The relative offset, which is the twoâs complement number stored in the last
byte of machine code corresponding to a branch instruction
Pseudo index register, memory location $000F
Memory location $000E pointing to the memory location deï¬ned by the
pseudo index register (location $000F)
Condition code register (CCR) bits
Z = Zero indicator
C = Carry/borrow
CCR activity notation
â = Bit not affected
0 = Bit forced to 0
1 = Bit forced to 1
â = Bit set or cleared according to results of operation
U = Undeï¬ned after the operation
Machine coding notation
MC9RS08KA2 Series Data Sheet, Rev. 3
Freescale Semiconductor
65
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