MC9RS08KA2_07 Datasheet, PDF (12/136 Pages) Freescale Semiconductor, Inc – Microcontrollers

Section Number
Title
Page
Chapter 9
Internal Clock Source (RS08ICSV1)
9.1 Introduction .....................................................................................................................................73
9.2 Introduction .....................................................................................................................................74
9.2.1 Features ...........................................................................................................................74
9.2.2 Modes of Operation ........................................................................................................74
9.2.2.1 FLL Engaged Internal (FEI) ...........................................................................74
9.2.2.2 FLL Bypassed Internal (FBI) ..........................................................................74
9.2.2.3 FLL Bypassed Internal Low Power (FBILP) ..................................................74
9.2.2.4 Stop (STOP) ....................................................................................................75
9.2.3 Block Diagram ................................................................................................................75
9.3 External Signal Description ............................................................................................................75
9.4 Register Definition ..........................................................................................................................76
9.4.1 ICS Control Register 1 (ICSC1) .....................................................................................76
9.4.2 ICS Control Register 2 (ICSC2) .....................................................................................77
9.4.3 ICS Trim Register (ICSTRM) ........................................................................................77
9.4.4 ICS Status and Control (ICSSC) ....................................................................................78
9.5 Functional Description ....................................................................................................................78
9.5.1 Operational Modes .........................................................................................................78
9.5.1.1 FLL Engaged Internal (FEI) ...........................................................................79
9.5.1.2 FLL Bypassed Internal (FBI) ..........................................................................79
9.5.1.3 FLL Bypassed Internal Low Power (FBILP) ..................................................79
9.5.1.4 Stop .................................................................................................................79
9.5.2 Mode Switching ..............................................................................................................79
9.5.3 Bus Frequency Divider ...................................................................................................79
9.5.4 Low Power Bit Usage .....................................................................................................79
9.5.5 Internal Reference Clock ................................................................................................80
9.5.6 Fixed Frequency Clock ...................................................................................................80
Chapter 10
Analog Comparator (RS08ACMPV1)
10.1 Introduction .....................................................................................................................................81
10.1.1 Features ...........................................................................................................................82
10.1.2 Modes of Operation ........................................................................................................82
10.1.2.1 Operation in Wait Mode ..................................................................................82
10.1.2.2 Operation in Stop Mode ..................................................................................82
10.1.2.3 Operation in Active Background Mode ..........................................................82
10.1.3 Block Diagram ................................................................................................................82
10.2 External Signal Description ............................................................................................................84
10.3 Register Definition ..........................................................................................................................84
10.3.1 ACMP Status and Control Register (ACMPSC) ............................................................84
10.4 Functional Description ....................................................................................................................85
MC9RS08KA2 Series Data Sheet, Rev. 3
12
Freescale Semiconductor