56F8033 Datasheet, PDF (60/157 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

5.6.1 Interrupt Priority Register 0 (IPR0)
Base + $0
Read
Write
RESET
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
PLL IPL
LVI IPL
0
0
RX_REG IPL TX_REG IPL TRBUF IPL BKPT_U IPL STPCNT IPL
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 5-3 Interrupt Priority Register 0 (IPR0)
5.6.1.1 PLL Loss of Reference or Change in Lock Status Interrupt Priority Level
(PLL IPL)—Bits 15–14
This field is used to set the interrupt priority levels for the PLL Loss of Reference or Change in Lock Status
IRQ. This IRQ is limited to priorities 1 through 3. It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 1
• 10 = IRQ is priority level 2
• 11 = IRQ is priority level 3
5.6.1.2 Low Voltage Detector Interrupt Priority Level (LVI IPL)—Bits 13–12
This field is used to set the interrupt priority levels for the Low Voltage Detector IRQ. This IRQ is limited
to priorities 1 through 3 and is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 1
• 10 = IRQ is priority level 2
• 11 = IRQ is priority level 3
5.6.1.3 Reserved—Bits 11–10
This bit field is reserved. Each bit must be set to 0.
5.6.1.4 EOnCE Receive Register Full Interrupt Priority Level
(RX_REG IPL)— Bits 9–8
This field is used to set the interrupt priority level for the EOnCE Receive Register Full IRQ. This IRQ is
limited to priorities 1 through 3. It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 1
• 10 = IRQ is priority level 2
• 11 = IRQ is priority level 3
56F8033/56F8023 Data Sheet, Rev. 6
60
Freescale Semiconductor