56F8033 Datasheet, PDF (129/157 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

1. Parameters listed are guaranteed by design.
Serial Peripheral Interface (SPI) Timing
SS
(Input)
SCLK (CPOL = 0)
(Output)
SCLK (CPOL = 1)
(Output)
MISO
(Input)
MOSI
(Output)
SS is held High on master
t_C
t_R
t_CL
t_F
t_CH
t_F
t_R
t_CL
t_DH
t_DS
MSB in
t_CH
Bits 14–1
LSB in
t_DI
t_DV
t_DI(ref)
Master MSB out
Bits 14–1
Master LSB out
t_F
t_R
Figure 10-7 SPI Master Timing (CPHA = 0)
56F8033/56F8023 Data Sheet, Rev. 6
Freescale Semiconductor
129