56F8033 Datasheet, PDF (28/157 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

Table 2-3 56F8033/56F8023 Signal and Package Information for the 32-Pin LQFP
Signal LQFP
Name Pin No.
Type
State During
Reset
Signal Description
GPIOB6
1
(RXD0)
Input/
Output
Input
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Receive Data 0 — QSCI0 receive data input.
(SDA¹¹)
Input/
Output
Serial Data — This pin serves as the I²C serial data line.
(CLKIN)
Input
External Clock Input — This pin serves as an external clock input.
After reset, the default state is GPIOB6. The peripheral functionality
is controlled via the SIM (See Section 6.3.16) and the CLKMODE bit
of the OCCS Oscillator Control Register.
11_{The SDA signal is also brought out on the GPIOB1 pin.}
GPIOB7
3
(TXD0)
Input/
Output
Input/
Output
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Transmit Data 0 — QSCI0 transmit data output or transmit/receive
in single wire operation.
(SCL¹²)
Input/
Output
Serial Clock — This pin serves as the I²C serial clock.
After reset, the default state is GPIOB7. The peripheral functionality
is controlled via the SIM. See Section 6.3.16.
12_{The SCL signal is also brought out on the GPIOB0 pin.}
GPIOC0
12
Input/
Output
Input
Port C GPIO — This GPIO pin can be individually programmed as
an input or output pin.
(ANA0 &
CMPAI3)
Analog
Input
ANA0 — Analog input to ADC A, Channel 0.
Comparator A, Input 3 — This is an analog input to Comparator A.
When used as an analog input, the signal goes to both the ANA0
and CMPAI3.
After reset, the default state is GPIOC0.
Return to Table 2-2
56F8033/56F8023 Data Sheet, Rev. 6
28
Freescale Semiconductor