MC68CK331CAG16 Datasheet, PDF (56/84 Pages) Freescale Semiconductor, Inc – 32-Bit Modular Microcontroller

Freescale Semiconductor, Inc.
DDRQS determines whether pins are inputs or outputs. Clearing a bit makes the corresponding pin an
input; setting a bit makes the pin an output. DDRQS affects both QSPI function and I/O function.
Table 24 Effect of DDRQS on QSM Pin Function
QSM Pin
MISO
MOSI
SCK¹
PCS0/SS
PCS[3:1]
TXD²
RXD
Mode
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Transmit
Receive
DDRQS
Bit
DDQ0
DDQ1
DDQ2
DDQ3
DDQ[4:6
]
DDQ7
None
Bit
State
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
NA
Pin Function
Serial Data Input to QSPI
Disables Data Input
Disables Data Output
Serial Data Output from QSPI
Disables Data Output
Serial Data Output from QSPI
Serial Data Input to QSPI
Disables Data Input
Disables Clock Output
Clock Output from QSPI
Clock Input to QSPI
Disables Clock Input
Assertion Causes Mode Fault
Chip-Select Output
QSPI Slave Select Input
Disables Select Input
Disables Chip-Select Output
Chip-Select Output
Inactive
Inactive
Serial Data Output from SCI
Serial Data Input to SCI
NOTES:
1. PQS2 is a digital I/O pin unless the SPI is enabled (SPE in SPCR1 set), in which case it becomes SPI serial
clock SCK.
2. PQS7 is a digital I/O pin unless the SCI transmitter is enabled (TE in SCCR1 = 1), in which case it becomes
SCI serial output TXD.
DDRQS determines the direction of the TXD pin only when the SCI transmitter is disabled. When the
SCI transmitter is enabled, the TXD pin is an output.
5.4 QSPI Submodule
The QSPI submodule communicates with external devices through a synchronous serial bus. The QSPI
is fully compatible with the serial peripheral interface (SPI) systems found on other Motorola products.
A block diagram of the QSPI is shown below.
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