MC68CK331CAG16 Datasheet, PDF (21/84 Pages) Freescale Semiconductor, Inc – 32-Bit Modular Microcontroller

Freescale Semiconductor, Inc.
PIRQL
000
001
010
011
100
101
110
111
Interrupt Request Level
Periodic Interrupt Disabled
Interrupt Request Level 1
Interrupt Request Level 2
Interrupt Request Level 3
Interrupt Request Level 4
Interrupt Request Level 5
Interrupt Request Level 6
Interrupt Request Level 7
PIV[7:0] —Periodic Interrupt Vector
The bits of this field contain the vector generated in response to an interrupt from the periodic timer.
When the SIM responds, the periodic interrupt vector is placed on the bus.
PITR —Periodic Interrupt Timer Register
$YFFA24
15
14
13
12
11
10
9
8
7
0
0
0
0
0
0
0
0
PTP
PITM
RESET:
0
0
0
0
0
0
0 MODCLK 0
0
0
0
0
0
0
0
The PITR contains the count value for the periodic timer. A zero value turns off the periodic timer. This
register can be read or written at any time.
PTP —Periodic Timer Prescaler Control
0 = Periodic timer clock not prescaled
1 = Periodic timer clock prescaled by a value of 512
The reset state of PTP is the complement of the state of the MODCLK signal during reset.
PITM[7:0] —Periodic Interrupt Timing Modulus Field
This is an 8-bit timing modulus. The period of the timer can be calculated as follows:
PIT Period = [(PITM)(Prescaler)(4)]/EXTAL
where
PIT Period = Periodic interrupt timer period
PITM = Periodic interrupt timer register modulus (PITR[7:0])
EXTAL Frequency = Crystal frequency
Prescale = 512 or 1 depending on the state of the PTP bit in the PITR
3.3 System Clock
The system clock in the SIM provides timing signals for the IMB modules and for an external peripheral
bus. Because MCU operation is fully static, register and memory contents are not affected when the
clock rate changes. System hardware and software support changes in the clock rate during operation.
The system clock signal can be generated in three ways. An internal phase-locked loop can synthesize
the clock from an internal or external frequency source, or the clock signal can be input from an external
source.
Following is a block diagram of the clock submodule.
MC68331TS/D
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