MC68CK331CAG16 Datasheet, PDF (37/84 Pages) Freescale Semiconductor, Inc – 32-Bit Modular Microcontroller

Freescale Semiconductor, Inc.
3.7 Resets
Reset procedures handle system initialization and recovery from catastrophic failure. The MCU per-
forms resets with a combination of hardware and software. The system integration module determines
whether a reset is valid, asserts control signals, performs basic system configuration based on hard-
ware mode-select inputs, then passes control to the CPU.
Reset occurs when an active low logic level on the RESET pin is clocked into the SIM. Resets are gated
by the CLKOUT signal. Asynchronous resets are assumed to be catastrophic. An asynchronous reset
can occur on any clock edge. Synchronous resets are timed to occur at the end of bus cycles. If there
is no clock when RESET is asserted, reset does not occur until the clock starts. Resets are clocked in
order to allow completion of write cycles in progress at the time RESET is asserted.
Reset is the highest-priority CPU32 exception. Any processing in progress is aborted by the reset ex-
ception, and cannot be restarted. Only essential tasks are performed during reset exception processing.
Other initialization tasks must be accomplished by the exception handler routine.
3.7.1 SIM Reset Mode Selection
The logic states of certain data bus pins during reset determine SIM operating configuration. In addition,
the state of the MODCLK pin determines system clock source and the state of the BKPT pin determines
what happens during subsequent breakpoint assertions. The following table is a summary of reset
mode selection options.
Mode Select Pin
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
DATA11
MODCLK
BKPT
Table 18 Reset Mode Selection
Default Function
(Pin Left High)
CSBOOT 16-Bit
CS0
CS1
CS2
CS3
CS4
CS5
CS6
CS[7:6]
CS[8:6]
CS[9:6]
CS[10:6]
DSACK0, DSACK1,
AVEC, DS, AS,
SIZ[1:0]
IRQ[7:1]
MODCLK
Test Mode Disabled
VCO = System Clock
Background Mode Disabled
Alternate Function
(Pin Pulled Low)
CSBOOT 8-Bit
BR
BG
BGACK
FC0
FC1
FC2
ADDR19
ADDR[20:19]
ADDR[21:19]
ADDR[22:19]
ADDR[23:19]
PORTE
PORTF
Test Mode Enabled
EXTAL = System Clock
Background Mode Enabled
3.7.2 Functions of Pins for Other Modules During Reset
Generally, pins associated with modules other than the SIM default to port functions, and input/output
ports are set to input state. This is accomplished by disabling pin functions in the appropriate control
registers, and by clearing the appropriate port data direction registers. Refer to individual module sec-
tions in this manual for more information. The following table is a summary of module pin function out
of reset.
MC68331TS/D
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