MC68CK331CAG16 Datasheet, PDF (50/84 Pages) Freescale Semiconductor, Inc – 32-Bit Modular Microcontroller

Freescale Semiconductor, Inc.
4.7 Background Debugging Mode
The background debugger on the CPU32 is implemented in CPU microcode. The background debug-
ging commands are summarized below.
Table 21 Background Debugging Mode
Command
Read D/A Register
Write D/A Register
Read System Register
Write System Register
Read Memory Location
Write Memory Location
Dump Memory Block
Fill Memory Block
Resume Execution
Patch User Code
Reset Peripherals
No Operation
Mnemonic
RDREG/RAREG
WDREG/WAREG
RSREG
WSREG
READ
WRITE
DUMP
FILL
GO
CALL
RST
NOP
Description
Read the selected address or data register and return the
results through the serial interface.
The data operand is written to the specified address or data
register.
The specified system control register is read. All registers that
can be read in supervisor mode can be read in background
mode.
The operand data is written into the specified system control
register.
Read the sized data at the memory location specified by the
long-word address. The source function code register (SFC)
determines the address space accessed.
Write the operand data to the memory location specified by the
long-word address. The destination function code (DFC)
register determines the address space accessed.
Used in conjunction with the READ command to dump large
blocks of memory. An initial READ is executed to set up the
starting address of the block and retrieve the first result.
Subsequent operands are retrieved with the DUMP command.
Used in conjunction with the WRITE command to fill large
blocks of memory. Initially, a WRITE is executed to set up the
starting address of the block and supply the first operand. The
FILL command writes subsequent operands.
The pipe is flushed and refilled before resuming instruction
execution at the current PC.
Current program counter is stacked at the location of the
current stack pointer. Instruction execution begins at user
patch code.
Asserts RESET for 512 clock cycles. The CPU is not reset by
this command. Synonymous with the CPU RESET instruction.
NOP performs no operation and can be used as a null
command.
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