MC68CK331CAG16 Datasheet, PDF (31/84 Pages) Freescale Semiconductor, Inc – 32-Bit Modular Microcontroller

Freescale Semiconductor, Inc.
At reset, either the alternate function (01) or chip-select function (11) can be encoded. DATA pins are
driven to logic level one by a weak internal pull-up during reset. Encoding is for chip-select function un-
less a data line is held low during reset. Note that bus loading can overcome the weak pull-up and hold
pins low during reset. The following table shows the hierarchical selection method that determines the
reset functions of pins controlled by CSPAR1.
Table 15 Reset Pin Function of CS[10:6]
DATA7
1
1
1
1
1
0
Data Bus Pins at Reset
DATA6 DATA5 DATA4
1
1
1
1
1
1
1
1
0
1
0
X
0
X
X
X
X
X
DATA3
1
0
X
X
X
X
Chip-Select/Address Bus Pin Function
CS10/ CS9/ CS8/ CS7/ CS6/
ADDR23 ADDR22 ADDR21 ADDR20 ADDR19
CS10 CS9
CS8
CS7
CS6
CS10 CS9
CS8
CS7 ADDR19
CS10 CS9
CS8 ADDR20 ADDR19
CS10 CS9 ADDR21 ADDR20 ADDR19
CS10 ADDR22 ADDR21 ADDR20 ADDR19
ADDR23 ADDR22 ADDR21 ADDR20 ADDR19
A pin programmed as a discrete output drives an external signal to the value specified in the port C pin
data register (PORTC), with the following exceptions:
A. No discrete output function is available on pins BR, BG, or BGACK.
B. ADDR23 provides E-clock output rather than a discrete output signal.
When a pin is programmed for discrete output or alternate function, internal chip-select logic still func-
tions and can be used to generate DSACK or AVEC internally on an address match.
Port size is determined when a pin is assigned as a chip select. When a pin is assigned to an 8-bit port,
the chip select is asserted at all addresses within the block range. If a pin is assigned to a 16-bit port,
the upper/lower byte field of the option register selects the byte with which the chip select is associated.
3.5.3 Base Address Registers
A base address is the starting address for the block enabled by a given chip select. Block size deter-
mines the extent of the block above the base address. Each chip select has an associated base register
so that an efficient address map can be constructed for each application. If a chip-select base address
register is programmed with the same address as a microcontroller module or memory array, an access
to that address goes to the module or array and the chip-select signal is not asserted.
CSBARBT — Chip-Select Base Address Register Boot ROM
$YFFA48
15
14
13
12
11
10
9
8
7
6
5
4
3
2
0
ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR
23
22
21
20
19
18
17
16
15
14
13
12
11
BLKSZ
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
CSBAR[10:0] —Chip-Select Base Address Registers
$YFFA4C–$YFFA74
15
14
13
12
11
10
9
8
7
6
5
4
3
2
0
ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR
23
22
21
20
19
18
17
16
15
14
13
12
11
BLKSZ
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BLKSZ —Block Size Field
This field determines the size of the block that must be enabled by the chip select. The following table
shows bit encoding for the base address registers block size field.
MC68331TS/D
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