MC68HC908QY4_10 Datasheet, PDF (54/168 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Configuration Register (CONFIG)
IRQPUD — IRQ Pin Pullup Control Bit
1 = Internal pullup is disconnected
0 = Internal pullup is connected between IRQ pin and V_DD
IRQEN — IRQ Pin Function Selection Bit
1 = Interrupt request function active in pin
0 = Interrupt request function inactive in pin
OSCOPT1 and OSCOPT0 — Selection Bits for Oscillator Option
(0, 0) Internal oscillator
(0, 1) External oscillator
(1, 0) External RC oscillator
(1, 1) External XTAL oscillator
RSTEN — RST Pin Function Selection
1 = Reset function active in pin
0 = Reset function inactive in pin
NOTE
The RSTEN bit is cleared by a power-on reset (POR) only. Other resets will
leave this bit unaffected.
Address: $001F
Bit 7
6
Read:
COPRS LVISTOP
Write:
Reset: 0
0
POR: 0
0
U = Unaffected
5
LVIRSTD
0
0
4
LVIPWRD
0
0
3
LVI5OR3
U
0
2
SSREC
0
0
1
STOP
0
0
Bit 0
COPD
0
0
Figure 5-2. Configuration Register 1 (CONFIG1)
COPRS (Out of STOP Mode) — COP Reset Period Selection Bit
1 = COP reset short cycle = 8176 × BUSCLKX4
0 = COP reset long cycle = 262,128 × BUSCLKX4
COPRS (In STOP Mode) — Auto Wakeup Period Selection Bit
1 = Auto wakeup short cycle = 512 × INTRCOSC
0 = Auto wakeup long cycle = 16,384 × INTRCOSC
LVISTOP — LVI Enable in Stop Mode Bit
When the LVIPWRD bit is clear, setting the LVISTOP bit enables the LVI to operate during stop mode.
Reset clears LVISTOP.
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
LVIRSTD — LVI Reset Disable Bit
LVIRSTD disables the reset signal from the LVI module.
1 = LVI module resets disabled
0 = LVI module resets enabled
MC68HC908QY/QT Family Data Sheet, Rev. 6
54
Freescale Semiconductor