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MC68HC908QY4_10 Datasheet, PDF (102/168 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers
Input/Output Ports (PORTS)
12.3.3 Port B Input Pullup Enable Register
The port B input pullup enable register (PTBPUE) contains a software configurable pullup device for each
of the eight port B pins. Each bit is individually configurable and requires the corresponding data direction
register, DDRBx, be configured as input. Each pullup device is automatically and dynamically disabled
when its corresponding DDRBx bit is configured as output.
Address: $000C
Bit 7
6
5
4
3
2
1
Bit 0
Read:
PTBPUE7 PTBPUE6 PTBPUE5 PTBPUE4 PTBPUE3 PTBPUE2 PTBPUE2 PTBPUE0
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 12-8. Port B Input Pullup Enable Register (PTBPUE)
PTBPUE[7:0] — Port B Input Pullup Enable Bits
These read/write bits are software programmable to enable pullup devices on port B pins
1 = Corresponding port B pin configured to have internal pull if its DDRB bit is set to 0
0 = Pullup device is disconnected on the corresponding port B pin regardless of the state of its
DDRB bit.
Table 12-3 summarizes the operation of the port B pins.
Table 12-3. Port B Pin Functions
PTBPUE
Bit
DDRB PTB
Bit
Bit
I/O Pin
Mode
Accesses to DDRB
Read/Write
1
0
X(1)
Input, VDD(2)
DDRB7–DDRB0
0
0
X
Input, Hi-Z(4)
DDRB7–DDRB0
X
1
X
Output
DDRB7–DDRB0
1. X = don’t care
2. I/O pin pulled to VDD by internal pullup.
3. Writing affects data register, but does not affect input.
4. Hi-Z = high impedance
Accesses to PTB
Read
Write
Pin
PTB7–PTB0(3)
Pin
PTB7–PTB0(3)
PTB7–PTB0
PTB7–PTB0
MC68HC908QY/QT Family Data Sheet, Rev. 6
102
Freescale Semiconductor